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360 Assembly/360 Instructions/ST – Wikibooks, open books for an open world

ST – Retailer – Opcode 50 – RX format Instruction (32 Bit)

ST 2,N2
ST 11,106(8,10)

The precise syntax is

ST supply register,displacement(index register,base register)

The place the displacement, index register and base register values can be decided mechanically by the assembler if the USING pseudo-instruction has been used, and the goal handle label used is inside 4096 bytes of the worth of some base register.

RX Instruction (Four bytes)
Byte 1 Byte 2 Bytes three and 4
supply register Goal Tackle
(In Hex) (Eight bits)
Opcode
50
(Four bits)

0..F

(Four bits)
index
register

0..F
(Four bits)
base
register

0..F
(12 bits)
displacement
0..FFF
  • The primary argument is a supply register which worth will not be affected by the instruction.
  • The second argument is the goal worth location handle the place the contents of the supply register are to be saved into. This consists of a base register, an index register, and a displacement handle. The displacement is used as an unsigned offset of Zero to 4095 from the worth within the base register, and this displacement is added to the worth contained within the base register. If the index register is 0, it’s ignored; in any other case, its contents are added to the earlier outcome to acquire the ultimate handle.
  • The base_register and index_register values are Zero to 15. The offset handle is Zero to 4095.

The goal and base_register values can be decided mechanically by the assembler if the USING pseudo-instruction has been used, and the goal handle label used (the displacement) is inside 4096 bytes of the worth of some base register.

Availability[edit]

The ST instruction is out there on all fashions of the 360, 370 and z/System.

Operation[edit]

The ST instruction takes the 32-bit integer worth contained within the supply register specified by the primary argument and shops that worth within the reminiscence handle specified by the second argument (the goal handle).

The goal handle is constructed by taking the worth saved within the base register, including to it the worth of the 12-bit offset (referred to as a displacement) handle, then including the worth saved within the index register (except the index register is 0, then its contents will not be added) to the bottom and displacement handle, to find out the goal handle. Within the above instance of the handle 106(8,10), the handle worth saved in register 10 is added to the displacement handle 106 (hexadecimal 6A), then the handle worth saved in register Eight is added to this to create the goal handle. Had register Zero been used as a substitute of 8, the worth saved in register Zero wouldn’t have been used.

The goal handle should be aligned to a phrase boundary (i.e. Four bytes). The Situation Code area within the Program Standing Phrase will not be modified.

Exceptions and Faults[edit]

  • The goal handle should be inside the vary of legitimate reminiscence or an operation exception happens.
  • The goal handle should be aligned to a phrase boundary or an handle exception happens.
  • The storage key for the goal handle should be the identical as the present course of (or the method should be privileged with a key of zero) or a reminiscence defend violate exception happens.

Most Carefully-related Instruction[edit]

Probably the most closely-related instruction is Add Logical Register (ALR) and never Load Tackle (LA), as is usually assumed. Whereas L hundreds a worth from reminiscence, LA doesn’t entry reminiscence; it solely calculates a quantity, which might however doesn’t must be an handle.

32-Bit Directions[edit]

  • To load an 8-bit byte (character) worth from reminiscence, see IC.
  • To load a number of 8-bit byte values right into a register based on a masks, see ICM
  • To load a 16-bit half-word worth from reminiscence, see LH.
  • To load a 12-bit unsigned worth right into a register or add as much as 4095 to the values in a single or two 32-bit registers, see LA.
  • To repeat a 32-bit phrase worth from one register to a different register, see LR.
  • To load a 32-bit phrase worth from reminiscence, see L.
  • To retailer an 8-bit byte (character) worth in reminiscence, see STC.
  • To retailer a number of 8-bit byte values into reminiscence based on a masks, see STCM
  • To retailer a 16-bit half-word worth in reminiscence, see STH.
  • To retailer a 32-bit phrase worth in reminiscence, see ST.

64-Bit Directions[edit]

  • To load a 20-bit signed worth right into a 32-bit or 64-bit register from an prolonged (20-bit) signed reminiscence offset, see LAY.
  • To load a 32-bit worth right into a 64-bit register from an prolonged (20-bit) signed reminiscence offset, see LGF.
  • To repeat a 64-bit worth from one 64-bit register to a different 64-bit register, see LGR.
  • To load a 64-bit worth right into a 64-bit register from reminiscence, see LG.
  • To retailer a 32-bit worth from a register to an prolonged (20-bit) signed reminiscence offset, see STY.
  • To retailer a 64-bit worth from a 64-bit register to an handle in reminiscence, see STG.

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